Fast Verilog/SystemVerilog simulator
Verilator is invoked with parameters similar to GCC or Synopsys’s VCS. It ``Verilates'' the specified Verilog or SystemVerilog code by reading it, performing lint checks, and optionally inserting assertion checks and coverage-analysis points. It outputs single- or multi-threaded .cpp
and .h
files, the ``Verilated'' code.
The user writes a little C++/SystemC wrapper file, which instantiates the Verilated model of the user’s top level module. These C++/SystemC files are then compiled by a C++ compiler (GCC/Clang/etc.). The resulting executable performs the design simulation. Verilator also supports linking its generated libraries, optionally encrypted, into other simulators.
System | Target | Derivation | Build status |
---|---|---|---|
x86_64-linux | /gnu/store/8v7xbjpgs9daq5vlzvihh7xqi8yjhf4h-verilator-4.110.drv | ||
x86_64-linux | i586-pc-gnu | /gnu/store/cracrvs7lw7qvap923jvgg6na5dj2ipv-verilator-4.110.drv | |
x86_64-linux | arm-linux-gnueabihf | /gnu/store/53kr5qnbiz8l25jgfh1z0il6c74yjrdc-verilator-4.110.drv | |
x86_64-linux | aarch64-linux-gnu | /gnu/store/vkm7wg8hhpsvrxffjh5kbcn4s2z59vcc-verilator-4.110.drv | |
powerpc64le-linux | /gnu/store/md23rgk0zdciaijhvxg8jz3rjwa3qcrl-verilator-4.110.drv | ||
mips64el-linux | /gnu/store/x2p85nk7n1pnyhxjsh2h1l4bnfryikwa-verilator-4.110.drv | ||
i686-linux | /gnu/store/bn127ccx354mn1m9ypcpy3zqdvgnax4f-verilator-4.110.drv | ||
i586-gnu | /gnu/store/wdck0b9ca1g6skmlc7nsqd4zc2llhqi4-verilator-4.110.drv | ||
armhf-linux | /gnu/store/mb2083iks9mb5b356c2rmkv0d35d86ca-verilator-4.110.drv | ||
aarch64-linux | /gnu/store/jqsim7k9qmhn407whz9qnj859jdl71j4-verilator-4.110.drv |
Linter | Message | Location |
---|---|---|
description Validate package descriptions | use @code or similar ornament instead of quotes | |
description Validate package descriptions | use @code or similar ornament instead of quotes |